Silicon carbide (silicon carbide, SiC), which has a wider band gap and a higher dielectric breakdown field intensity than those of silicon (Si), is a semiconductor material whose applications to low-loss power devices and the like of the next generation are expected. Silicon carbide has many polytypes such as 3C—SiC having a cubic system and 6H—SiC and 4H—SiC having a hexagonal system. Among these, it is 4H—SiC that is commonly used for producing practical silicon carbide semiconductor devices. Generally speaking, substrates whose principal faces are faces substantially coinciding with the (0001) plane, which is perpendicular to a crystal axis of the c axis, are broadly used.
In order to produce a silicon carbide semiconductor device (SiC semiconductor device), it is necessary to form an epitaxially-grown layer to become an active region of the semiconductor device on a silicon carbide substrate (SiC substrate), and control the conductivity type and carrier concentration in selected regions of this layer. In order to form an impurity-doped region in a selected local region, it is indispensable to perform an ion implantation of an impurity dopant into the epitaxially-grown layer.
Hereinafter, with reference to FIGS. 6(a) to (d), a conventional method of forming an impurity-doped region will be described, by taking as an example a method of forming a p-well region of a MOSFET disclosed in Patent Document 1.
First, as shown in FIG. 6(a), a silicon carbide layer 41 functioning as an n-drift layer is formed on an SiC substrate 40. As the SiC substrate 40, an SiC substrate having a surface (step structure surface) with an increased step density, which is tilted by several degrees (OFF angle) from the (0001) plane, is used. On this surface of the SiC substrate 40, the silicon carbide layer 41 is epitaxially grown by utilizing a step flow based on lateral growth of the steps. Next, an ion implantation mask 42 is formed on a front face of the silicon carbide layer 41. The implantation mask 42 is provided in a region of the silicon carbide layer 41 other than the region where a p-well region 46 (FIG. 6(d)) is formed.
Next, as shown in FIG. 6(b), impurity ions (Al ions) 44 are implanted into the silicon carbide layer 41 from above the implantation mask 42. Thereafter, as shown in FIG. 6(c), the implantation mask 42 is removed, and a capping layer 45 composed of a diamond-like carbon film or organic film is formed only on the front face of the silicon carbide layer 41, in which an impurity ion-implanted region 43 has been formed.
Thereafter, as shown in FIG. 6(d), an activation annealing treatment is performed to effect recovery from the damage caused in the crystal due to ion implantation and activation of the impurity ions. The activation annealing treatment is performed by heating the silicon carbide substrate 40 to a temperature of 1700° C. or above. Through the activation annealing treatment, the p-well region 46 is formed in a portion of the silicon carbide layer 41 as an impurity-doped region. The region of the silicon carbide layer 41 where the p-well region 46 is not formed defines an n-drift region 47.
[Patent Document 1] Japanese Patent No. 3760688